2 - Silicon Based Substrates and Select Refractory Metals

• III-V Compound Semiconductor Allowed

• Whole wafers sized for available chucks only

• 4 and 6 Wafers (pieces possible)
• Wafers must not be excessively thin or thick
• No GaAs

• CMOS compatible metals only at this time.
• - Adhesives are not allowed (scotch tape, Kapton tape, glues, epoxies, greases, etc are not allowed) in the chamber. Only use clips to secure substrates.

• No high vapor pressure materials (lead, indium, ITO, etc.)
• No Pyrex or Borofloat etching
• Limited metals allowed - please discuss with tool manager (Ni not allowed as an etch mask)

• Only CMOS compatible materials - Si, SiO2, Si3N4, CNF Refractory metals (Al, Ti,Ta,W,Pt,Mo,Cr, Co, and Ni), standard resists
• No gold or silver, exposed or buried
• No high vapor pressure materials (lead, indium, ITO), exposed or buried
• No microscope slides
• Do not exceed maximum RF power of 300W
• Do not clean chamber with wipes or solvent. Report contamination to tool manager

• No III-V material etching
• Remove the resist bead from whole 4-inch wafers
• Pieces should be mounted to the sapphire wafer

• Whole 4 wafers only
• Thermal / PECVD SiO2, photoresist, Al2O3 etch masks ONLY
• If mask is resist, 5mm of the edge must be removed
• See tool manager about bonding wafer pieces to carrier

Select III/V materials allowed- ask staff before proceeding!

• No samples with resist, glue, metals, or anything that may degas - Calibrated for whole Silicon wafers - Discuss pieces or other materials with tool manager

• Whole 4 silicon wafers and pieces mounted to sapphire wafer
• Thermal Oxide, Photoresist or Alumina (Al2O3) masks only
• Photoresist masks require edge bead removal (> 5mm around entire edge of wafer)
• No other polymers or adhesives
• No metals exposed to the plasma.

• No SU-8
• III/V substrates allowed.